Deliverable 9.1: Report on the design of the digital exciter

Deliverable 9.1 of the FP7-supported EISCAT_3D Preparatory Phase project is a report describing the design, construction and verification of a prototype transmitter exciter for the EISCAT_3D phased-array research radar system.

The two prototype versions of the exciter presented here are designed around the Analog Devices AD9957 quadrature upconverter (QDUC) evaluation board, EVAL-AD9957. The second (triple-channel) version can implement the required transmitter arbitrary modulation, spectrum masking and time-domain beam steering capabilities up to baseband data rates of at least 60 Msamples/second, while at the same time maintaining phase noise and spurious emission levels below the EISCAT_3D performance specification limits. It is recommended as a suitable starting point for the design of a mass-produced, multi-channel arbitrary-waveform exciter for the EISCAT_3D radar.

Report on the design of the digital exciter

Shown above are the most important subsystems of the prototype single-channel AD9957-based exciter. The PROM is programmed with eight equal-magnitude I/Q pairs, positioned at (n · π/4, n = 0,…,7) on the unit circle; this data set can be used to implement constant-amplitude eight-phase coding at many existing ISR systems.